An Examination of the Graphics Engine and Display Controller Capabilities in the Apollo Lake Family of Low-Power SOCs
This document will detail the graphics and image processing capabilities present in the Apollo Lake family of low power SOCs. Intel’s Apollo Lake Atom system-on-chip (SOC) integrates the next generation of the Intel processor Core, Graphics, Memory Controller, and I/O interfaces. The graphics and image processing components of the Apollo Lake SOC are comprised of a 9th generation Intel graphics processor and display controller. The Gen9 LP graphics engine contains three groups (subslices) of eight execution units (EUs) each. The EUs are connected to the CPU cores and the System Agent using a ring topology that supports a 32 bit bi-directional data bus, with separate lines for request, snoop, and acknowledge. The ring attached System Agent provides access to the SOC’s DRAM memory management unit, the display controller, and other off-chip IO controllers such as PCIe.
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